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História técnica recente do firmware Micro-1

A ROM para o Micro mk 1 é atualizada por substituição; não pode ser atualizado online. Você pode baixar o código e fazer sua própria ROM a partir de uma EPROM 27C512, usando um soprador EPROM. Depois de fazer isso, você terá que desmontar o micro para instalar a nova ROM. Clique aqui para obter instruções completas.

Baixe o último micro018.rom - ou envie um e-mail para nós e nós postaremos um para você.


Data Versão Resumo
04/06 18

Fixes an occasional spurious clock 0 and 1 self test error.

04/03 17

Prevents USB character data overflow.

07/01 16 getSysData extended to return max channels in non burst mode.
Burst mode result fixed.

setAdcList now allows the maximum channel possible.

02/01 15 Fixed minor error in USB read data sequencing.
02/00 14 Fixed error in diagnostic ramp address that caused the 1401 to hang.
Self-test errors with cable out did not give usual flashing LED behaviour.
11/99 13 Added code to support the USB and provide diagnostics, plus minor fixes.
Error1401 added to symbol table.
11/98 12 Offset parameter for TOHOST/TO1401 changed to 32 bit.
08/98 11 ADC command does setAdcSilo(1,1) to reset the silo.
07/98 10 Inverted sense of events read from switch pack to match documentation.

New FPGA version 4, adds ADC convert on clock start.

Added support for extension EEProm in top boxes (but resistor is missing from data line!).

Now allows up to 32 values returned from command (was 10).

09/97 09 Fixed command loading bug.

If command had little un-initialised data, could corrupt relocation table.

Now CLOAD returns 253,0 - corrupt command header, 253,1 - unknown symbol referenced, 253,2 relocation overflow.

05/97 08 Set host ports back to 100 ns as it caused errors when top boxes added.
04/97 07 Changed DAC1 use in self test to use raw o/p so that the patch card would not foul up self-test.
Set the host port speeds to M0 (50 ns), was 100ns.
??/97 06 Internal testing version for host port/PCI speed up.
12/96 05 Fixed faults in blkSetA\blkSet that caused incorrect use of the advanced DMA modes.
10/96 04 Added support for Spike2 top box LEDs.
06/96 03 DAC command was using SHORTREF() to update DACs. This meant that only upper 8-bits were set as compiler did two 8-bit writes, and ls byte was lost
04/96 02 No code changes (u1401mon.c had REVISION changed to 2).
XILINX code modified to: 1)Link DILCSR flag to E1 int, 2) Fix state of unused pins on XILINX parts.
01/96 01 Changed the bitmap length for FPGA to 0x168f1.
Changed EEPRdCode to set Z flag if all ok. This made Auto-setting of ADC gain/offset work.

RESET revision changed, Labelled as ROM 0.01.

Cambridge Electronic Design Limited

Registrado em Inglaterra: 00972132

Escritório registrado:

  • Cambridge Electronic Design Limited,
  • Technical Centre,
  • 139 Cambridge Road,
  • Milton,
  • Cambridge CB24 6AZ
  • ENGLAND.

VAT: GB 214 2617 96

Número de registo do produtor: WEE/BD0050TZ

Termos e Condições de Venda

Para os nossos clientes nos EUA, podemos fornecer o formulário fiscal W-8BEN, que identifica-nos como uma empresa do Reino Unido.

DUNS: 219151016
CAGE/NCAGE: KB797
NAICS: 423490
Códigos de mercadorias
Hardware: 84716070
Software: 85234945
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Por email:

info@ced.co.uk

Por correio:
  • Cambridge Electronic Design Limited,
  • Technical Centre,
  • 139 Cambridge Road,
  • Milton,
  • Cambridge CB24 6AZ
  • ENGLAND.
Por telefone:

(Int.+44) (0)1223 420186

Da América do Norte (ligação gratuita):

1 800 345 7794

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