CED Downloads | Power1401-3a firmware technical history

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Recent technical history of Power1401-3A firmware

There are two types of firmware in the Power1401: software and hardware. The software firmware is the program code that tests the Power1401 when you switch it on and that then obeys instructions transmitted from the host. The hardware firmware includes controls for components such as the ADC and DACs, the clocks, the digital input and output, and the host ports.

Revision 10 - Freely downloadable now.

If your serial number is below P6000, see the history of the Power3.

Date	Version	Summary

11/24	10	Monitor 10
		FPGA 7 Improves reliability of clocked DAC updates on top boxes that have DACs. No need to update the FPGA if user does not have either of these two top boxes.

03/22	09	Monitor 9
		INFO,46; added to report high-speed clock rate in MHz. Monitor 08 code did not report ADC gain.

10/18	08	Monitor 8
		TIMER,S; monitor command failed as it demanded 5 arguments. Now it works and matches the documentation. The DAC monitor command can now update up to 16 DACs (was 4). Self-test: RS232 serial output of self-test errors 81, 82 was omitted (Try1401 was OK). Combination of Top box with ADC gains and motherboard with no gains caused crash on gain change.

02/17	07	Monitor 7
		The front panel Event 0 and 1 LEDs will now turn on when input is expected in Spike2/Signal and blink off on each event, rather than be off and blink on for each event. Fix for setting the (optional) ADC channel gains. There is also a bug fix to do with the digital port handshake protocols.

10/16	06	Monitor 6
		FPGA 6 Fixed ADC errors at higher speeds and spurious interrupt errors. Digital I/O handshake mode implemented.

08/16	01	First version